PVT Characterization

Comprehensive testing and data collection is commonly referred to as PVT(Process, Voltage, Temperature) characterization.

Devices specially manufactured with controlled fabrication process variations are typically available for test.

Process Corner Poly NMOS PMOS
SSS slow slow slow
SS typical slow slow
SF typical slow fast
TT typical typical typical
FS typical fast slow
FF typical fast fast
FFF fast fast fast

For CMOS devices,

\( I = {\mu}C_{ox}{ W \over L }{(V_{GS}-V_t)}^2 \)

As process geometries shrink, i.e. L decreases, I increases, devices charge and discharge faster, so frequency of operation increases.

Vmin Vnom Vmax

Tests are repeated at the min/nom max tolerance for the power supply voltage which should be part of the device specifications. Higher Vdd means higher current I, so frequency of operation increases.

\(-40^{\circ}\)C \(25^{\circ}\)C \(85^{\circ}\)C

Tests are repeated for the specified variation in temperature. Higher temperature means more collisions of charge carriers, which slows down the circuit, i.e. frequency of operation decreases. However, for processes smaller than 65nm, temperature inversion occurs.

Min/Nom/Max supply and temperature testing may be part of the production flow on industrial grade devices or devices intended for automotive use.


  1. Understanding Process Corner (Corner Lots)
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